The present invention relates to an improved MOS semiconductor device and a manufacturing method thereof.
Recently, semiconductor elements are becoming smaller and semiconductor devices are being packed with higher density. One of the factors which interferes with the higher packing density of the semiconductor devices is the problem of wiring between elements. In the case of a circuit which combines more than one transistor for controlling the electrical characteristics of a second transistor by utilizing the output voltage of a first transistor as a gate voltage to the second transistor, it has been required, as shown in FIG. 1, to form a contact hole 111a in a source region 103 or a drain region 104 of a first transistor Q.sub.1 (this transistor comprising a gate electrode 101, the source region 103, the drain region 104, a gate electrode wiring part 107 and a source electrode 108, with numeral 111 denoting a contact hole); to form a contact hole 111b at a gate electrode 102 side of a second transistor Q.sub.2 (this transistor comprising a gate electrode 102, a source region 105, a drain region 106, a source electrode 109 and a drain electrode 110, with numeral 111 denoting a contact hole); and to supply a voltage to the gate electrode 102 of the second transistor Q.sub.2 using a suitable wiring material 120 such as Al. Accordingly, it was necessary in each region to secure a space in the contact hole for obtaining good ohmic contact, to secure a space for these regions and the Al wiring, and to consider the breaking of the wiring in places such as at the end of the contact hole.